General Description
The Samsung S3C2413 is optimized for embedded and mobile applications, featuring a 16/32-bit ARM926EJ-S core, on-chip peripherals that include a camera interface and low voltage supported by Samsung's low-power technology. This mobile processor gives designers of products such as smartphones, VoIP phones, portable GPS navigation devices and PDAs a solution for reducing system cost while providing maximum flexibility.
An enhanced NAND controller on the S3C2413 interfaces with an array of NAND flash types, highlighted by OneNAND™ Flash. This advanced fusion memory features high-density NAND with NOR interface, delivering high performance and fast boot up. In addition, the 266MHz Samsung processor interfaces with NOR, SRAM, low-power mobile SDRAM and mobile DDR, as well as removable storage like SD and MMC. The S3C2413 also supports an enhanced set of power modes to reduce power consumption. Displays types range from 65K-color STN to 16M-color TFT-LCD in a variety of resolutions, thus enhancing design flexibility.
Samsung created the S3C2413 to give handheld devices extremely broad features and performance while offering attractive price points.
Block Diagram
Features
- Architecture

- 16/32-bit RISC ARM926EJ-S core

- 64-way set-associative cache with I-cache (8KB) and D-cache (8KB)

- ARM's Jazelle Java technology enhanced ARM architecture

- AMBA 2.0, AHB/APB

- MMU to support WinCE, Symbian and Linux
- System Manager

- Address space : 128M bytes for each bank (total 1G bytes)

- Little/Big Endian support

- Eight memory banks :

- Six memory banks for SSMC, ROM, SRAM and others

- Two memory banks for SDRAM (supports DDR)

- Supports a synchronous static memory-mapped devices including RAM, ROM, OneNAND™ and flash (SLC/MLC)

- 100/133MHz address and command bus speed

- Nand Flash Bootloader
- On-chip Peripherals

- Power management : Normal, Idle, stop and sleep mode

- Camera interface (up to 2M)

- ITU-R BT 601/656 8-bit mode support

- DZI (Digital Zoom In) capability

- 1600 x 1200 pixel input support for scaling

- 2-port USB Host / 1- port USB Device

- SD Host interface version 1.0 & Multimedia card protocol version 2.11 compatible

- ATA Interface

- 1-ch multi-master IIC-BUS/1-ch IIS-BUS controller

- RTC with calendar function

- On-chip clock generator with PLL

- 16 bit Watch-dog timer

- 4-ch PWM timers & 1-ch internal timer

- 3-ch UART

- 2-ch SPI

- 115-bit general purpose I/O ports

- 24-ch external interrupt source

- LCD controller (up to 65K color STN and 16M color TFT) with 1-ch LCD-dedicated DMA

- 8-ch 10-bit ADC and touch screen interface
Benefits
- Cost-effective solution
- High performance but low power consumption
- Built-in NAND Flash Bootloader
- Full set of on-chip peripherals
- Design flexibility
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